From alsa-devel-owner@alsa.jcu.cz  Fri Dec 18 20:55:26 1998
Received: from panix2.panix.com (kenny@panix2.panix.com [166.84.1.67])
	by marvin.jcu.cz (8.9.1a/8.9.1) with ESMTP id UAA01158
	for <alsa-devel@alsa.jcu.cz>; Fri, 18 Dec 1998 20:55:12 +0100
Received: (from kenny@localhost)
	by panix2.panix.com (8.8.5/8.8.8/PanixU1.4) id OAA16614
	for alsa-devel@alsa.jcu.cz; Fri, 18 Dec 1998 14:55:08 -0500 (EST)
Date: Fri, 18 Dec 1998 14:55:08 -0500 (EST)
From: Kenneth Crudup <kenny@panix.com>
Message-Id: <199812181955.OAA16614@panix2.panix.com>
To: alsa-devel@alsa.jcu.cz
Subject: Re: i'm a bit confused about PCI DMA versus Bus-Master..
Reply-To: alsa-devel@alsa.jcu.cz
Sender: alsa-devel-owner@alsa.jcu.cz
Precedence: list


  There is many way to do ADC and DAC on these chips:
  - programmed I/O (to avoid like the plague in a multitasking environment)
  - non autoinit DMA (not suitable for a not real time OS, I think)
  - autoinit DMA with interrupt raise at end of fragment (the best way, but
    I'm not able to make it work)
  - hybrid way (like in that C source)

  I don't know how Windows driver works,

Probably with PIO; what do they care if they break multitasking?

  I hope that my experience with ES1869 would be useful to other ESS
  driver developer.

It *appears* that the ESS Maestro 2 does this correctly- there's two 16-bit
registers in I/O space that determine the PCI base address for wavetable and
wave cache operation.

	-Kenny


